FL=0, CEEN=0, SRCEN=0, UDEN=0, FICRAE=0, OVEN=0, CL=0, OFS=000, IFS=others
Control Register
| OFS | Output Sampling Rate 0 (others): Settings other than above are prohibited. 0 (000): 44.1 kHz 1 (001): 48.0 kHz 2 (010): 32.0 kHz 3 (011): Setting prohibited 4 (100): 8.0 kHz ( Valid only when IFS[3:0] =1001b ) 5 (101): 16.0 kHz ( Valid only when IFS[3:0] =1001b ) |
| IFS | Input Sampling Rate 0 (0000): 8.0 kHz 0 (others): Settings prohibited. 1 (0001): 11.025 kHz 2 (0010): 12.0 kHz 3 (0011): Setting prohibited 4 (0100): 16.0 kHz 5 (0101): 22.05 kHz 6 (0110): 24.0 kHz 7 (0111): Setting prohibited 8 (1000): 32.0 kHz 9 (1001): 44.1 kHz 10 (1010): 48.0 kHz |
| CL | Internal Work Memory Clear 0 (0): no effect 1 (1): Clears the input FIFO, output FIFO, input buffer memory, intermediate memory and accumulator. |
| FL | Internal Work Memory Flush 0 (0): no effect 1 (1): starts converting the sampling rate of all the data in the input FIFO, input buffer memory, and intermediate memory(i.e., flush processing). |
| OVEN | Output Data FIFO Overwrite Interrupt Enable 0 (0): Output data FIFO overwrite interrupt is disabled. 1 (1): Output data FIFO overwrite interrupt is enabled. |
| UDEN | Output Data FIFO Underflow Interrupt Enable 0 (0): Disables output data FIFO underflow interrupt requests. 1 (1): Enables output data FIFO underflow interrupt requests. |
| SRCEN | Module Enable 0 (0): Disables this module operation. 1 (1): Enables this module operation. |
| CEEN | Conversion End Interrupt Enable 0 (0): Disables conversion end interrupt requests. 1 (1): Enables conversion end interrupt requests. |
| FICRAE | Filter Coefficient Table Access Enable 0 (0): Reading/writing to filter coefficient table RAM is disabled. 1 (1): Reading/writing to filter coefficient table RAM is enabled. |